A wide range of semiconductor circuits are well known today using a wide range of known technology. Increasing demand for high performance, multi-functional semiconductor circuits challenges semiconductor designers to incorporate more semiconductor components into limited space. It is known to increase volumetric density of semiconductor packaging by packaging semiconductor chips in “chip stacks”, interconnecting a number of the semiconductor chips using conductive connections such as solder ball or other techniques to provide electrical connections between the chips in the chip stack.
It was known to manufacture microprocessors as semiconductor circuits with compartmentalized structures having multiple functions. A multi-core processor, for example, incorporates two or more processors into a single integrated circuit.
System-on-chip architecture is also known where several system components are formed as a single integrated circuit. In such architectures, the components of the integrated circuit may not all operate simultaneously. It was known to utilize clock-gating techniques to eliminate the switching portion of the power dissipation from unused circuits (leaving only the DC leakage power). It was also known to dynamically disconnect power to portions of an integrated circuit that are not currently operating. This further reduces power consumption.
It was known to use a field effect transistor having a gate, source, and drain, controlled by a power gating controller, as a switch to selectively and dynamically disconnect power to inactive portions of an integrated circuit to reduce power consumption. Using standard transistors for power switching however results in leakage power. Leakage power is to first order inversely proportional to transistor length. Specifically, longer transistors leak less than shorter transistors. Power leakage is generally tracked by a constant divided by the channel length. Also, the known transistors used to selectively gate power to portions of the integrated circuit take up valuable surface area on the semiconductor chip which may be needed for other circuitry.
Through-silicon via (TSV) technology was known for power distribution within chip-stacking, multi-core and system-on-chip architectures. TSV technology conserves valuable chip surface area by using through holes, filled with a conductive material, in a silicon substrate to form an electrical connection between the top and bottom surfaces of a chip. FIG. 1 illustrates a standard through-silicon via (TSV) structure 102 for delivering power from a top silicon chip through a top bond pad 106 to a bottom silicon chip through a bottom bond pad 110. TSV 102 is filled with conductive material 116 which provides an electrical pathway through semiconductor chip 112 between top silicon chip and bottom silicon chip. TSV 102, top bond pad 106, and bottom bond pad 110 are electrically isolated from semiconductor chip 112 by dielectric coated region 114.
An object of the present invention is to selectively control power delivery to active portions of an integrated circuit, yet minimize power leakage and amount of semiconductor surface area used for the selective power delivery.